Produced	From 1998 to present
Common manufacturer(s)	Intel
Max. CPU clock rate	400 MHz to 3.8 GHz
FSB speeds	100 MHz to 6.4 GT/s
Instruction set	IA-32, x86-64
Microarchitecture	Nehalem, Core, NetBurst, P6
Cores	1, 2, 4, 6, or 8

The Xeon is a brand of multiprocessing- or multi-socket-capable x86 microprocessors from Intel Corporation targeted at the non-consumer server, workstation and embedded system markets.

Contents 1 Overview 2 P6 based Xeon 2.1 Pentium II Xeon 2.2 Pentium III Xeon 3 Netburst based Xeon 3.1 Xeon (DP) & Xeon MP (32-bit) 3.1.1 Foster 3.1.2 Prestonia 3.1.3 Gallatin 3.2 Xeon (DP) & Xeon MP (64-bit) 3.2.1 Nocona and Irwindale 3.2.2 Cranford and Potomac 3.3 Dual-Core Xeon 3.3.1 "Paxville DP" 3.3.2 7000-series "Paxville MP" 3.3.3 7100-series "Tulsa" 3.3.4 5000-series "Dempsey" 4 Pentium M (Yonah) based Xeon 4.1 LV (ULV), "Sossaman" 5 Core based Xeon 5.1 Dual-Core 5.1.1 3000-series "Conroe" 5.1.2 3100-series "Wolfdale" 5.1.3 5100-series "Woodcrest" 5.1.4 5200-series "Wolfdale-DP" 5.1.5 7200-series "Tigerton" 5.2 Quad-Core and Multi-Core Xeon 5.2.1 3200-series "Kentsfield" 5.2.2 3300-series "Yorkfield" 5.2.3 5300-series "Clovertown" 5.2.4 5400-series "Harpertown" 5.2.5 7300-series "Tigerton" 5.2.6 7400-series "Dunnington" 6 Nehalem based Xeon 6.1 3400-series "Lynnfield" 6.2 3400-series "Clarkdale" 6.3 3500-series "Bloomfield" 6.4 5500-series "Gainestown" 6.5 C3500/C5500-series "Jasper Forest" 6.6 3600/5600-series "Gulftown" 6.7 6500/7500-series "Beckton" 7 Future versions 8 Supercomputers 9 See also 10 References 11 External links

Overview

The Xeon brand has been maintained over several generations of x86 and x86-64 processors. Older models added the Xeon moniker to the end of the name of their corresponding desktop processor, but more recent models used the name Xeon on its own. The Xeon CPUs generally have more cache than their desktop counterparts in addition to multiprocessing capabilities.

Intel Xeon processor family
Original Logo	New Logo	Server - (UP/DP) 3000/5000 series			Server - (MP) 7000 series
		Code-named	Core	Date released	Code-named	Core	Date released
					Drake	(250 nm)	Jun 1998
					Tanner Cascades	(250 nm) (180 nm)	Mar 1999 Oct 1999
		Foster Prestonia Gallatin Nocona Irwindale Paxville Dempsey	(180 nm) (130 nm) (130 nm) (90 nm) (90 nm) dual (90 nm) dual (65 nm)	May 2001 Feb 2002 Mar 2003 Jun 2004 Feb 2005 Oct 2005 May 2006	Foster MP Gallatin MP Cranford Potomac Paxville MP Tulsa	(180 nm) (130 nm) (90 nm) (90 nm) dual (90 nm) dual (65 nm)	Mar 2002 Nov 2002 Mar 2005 Mar 2005 Dec 2005 Aug 2006
		Sossaman Woodcrest Conroe Allendale Wolfdale Kentsfield Yorkfield	dual (65 nm) dual (65 nm) dual (65 nm) dual (65 nm) dual (45 nm) quad (65 nm) quad (45 nm)	Mar 2006 Jun 2006 Oct 2006 Jan 2007 Feb 2008 Jan 2007 Mar 2008	Tigerton Dunnington Dunnington	dual (65 nm) quad (45 nm) six (45 nm)	Sep 2007 Sep 2008 Sep 2008
		Wolfdale DP Clovertown Harpertown Nehalem-EP Bloomfield	dual (45 nm) quad (65 nm) quad (45 nm) dual/quad (45 nm) quad (45 nm)	Nov 2007 Nov 2006 Nov 2007 Mar 2009 Mar 2009
List of Intel Xeon microprocessors

P6 based Xeon

Pentium II Xeon

The first Xeon-branded processor was the Pentium II Xeon (code-named "Drake"). It was released in 1998, replacing the Pentium Pro in Intel's server lineup. The Pentium II Xeon was a "Deschutes" Pentium II (and shared the same product code: 80523) with a full-speed 512 KB, 1 MB, or 2 MB L2 cache. The L2 cache was implemented with custom 512 KB SRAMs developed by Intel. The number of SRAMs depended on the amount of cache. A 512 KB configuration required one SRAM, a 1 MB configuration: two SRAMs, and a 2 MB configuration: four SRAMs on both sides of the PCB. Each SRAM was a 12.90 mm by 17.23 mm (222.21 mm²) die fabricated in a 0.35 µm four-layer metal CMOS process and packaged in a cavity-down wire-bonded land grid array (LGA).^[1] The additional cache required a larger module and thus the Pentium II Xeon used a larger slot, Slot 2. It was supported by the 440GX dual-processor workstation chipset and the 450NX quad- or octo-processor chipset.

Pentium III Xeon

In 1999, the Pentium II Xeon was replaced by the Pentium III Xeon. Reflecting the incremental changes from the Pentium II "Deschutes" core to the Pentium III "Katmai" core, the first Pentium III Xeon, named "Tanner", was just like its predecessor except for the addition of Streaming SIMD Extensions (SSE) and a few cache controller improvements. The product codes for Tanner mirrored that of Katmai; 80525.

The second version, named "Cascades", was based on the Pentium III "Coppermine" core. The "Cascades" Xeon used a 133 MT/s bus and relatively small 256 KB on-die L2 cache resulting in almost the same capabilities as the Slot 1 Coppermine processors, which were capable of dual-processor operation but not quad-processor operation.

To improve this situation, Intel released another version, officially also named "Cascades", but often referred to as "Cascades 2 MB". That came in two variants: with 1 MB or 2 MB of L2 cache. Its bus speed was fixed at 100 MT/s, though in practice the cache was able to offset this. The product code for Cascades mirrored that of Coppermine; 80526.

Netburst based Xeon

Xeon (DP) & Xeon MP (32-bit)

Foster

In mid-2001, the Xeon brand was introduced ("Pentium" was dropped from the name). The initial variant that used the new NetBurst microarchitecture, "Foster", was slightly different from the desktop Pentium 4 ("Willamette"). It was a decent chip for workstations, but for server applications it was almost always outperformed by the older Cascades cores with a 2 MB L2 cache and AMD's Athlon MP. Combined with the need to use expensive Rambus Dynamic RAM, the Foster's sales were somewhat unimpressive.

At most two Foster processors could be accommodated in a symmetric multiprocessing (SMP) system built with a mainstream chipset, so a second version (Foster MP) was introduced with a 1 MB L3 cache and the Jackson Hyper-Threading capacity. This improved performance slightly, but not enough to lift it out of third place. It was also priced much higher than the dual-processor (DP) versions. The Foster shared the 80528 product code with Willamette.

Model	Speed (GHz)	L2 Cache (KB)	FSB (MT/s)	TDP (W)
	1.4	256	400	56
	1.5	256	400	59.2
	1.7	256	400	65.8
	2.0	256	400	77.5

Prestonia

In 2002 Intel released a 130 nm version of Xeon branded CPU, codenamed "Prestonia". It supported Intel's new Hyper-Threading technology and had a 512 KB L2 cache. This was based on the "Northwood" Pentium 4 core. A new server chipset, E7500 (which allowed the use of dual-channel DDR SDRAM), was released to support this processor in servers, and soon the bus speed was boosted to 533 MT/s (accompanied by new chipsets: the E7501 for servers and the E7505 for workstations). The Prestonia performed much better than its predecessor and noticeably better than Athlon MP. The support of new features in the E75xx series also gave it a key advantage over the Pentium III Xeon and Athlon MP branded CPUs (both stuck with rather old chipsets), and it quickly became the top-selling server/workstation processor.

Gallatin

Subsequent to the Prestonia was the "Gallatin", which had an L3 cache of 1 MB or 2 MB. Its Xeon MP version also performed much better than the Foster MP, and was popular in servers. Later experience with the 130 nm process allowed Intel to create the Xeon MP branded Gallatin with 4 MB cache. The Xeon branded Prestonia and Gallatin were designated 80532, like Northwood.

Xeon (DP) & Xeon MP (64-bit)

Nocona and Irwindale

Due to a lack of success with Intel's Itanium and Itanium 2 processors, AMD was able to introduce x86-64, a 64-bit extension to the x86 architecture. Intel followed suit by including Intel 64 (formerly EM64T; it is almost identical to AMD64) in the 90 nm version of the Pentium 4 ("Prescott"), and a Xeon version codenamed "Nocona" with 1 MB L2 cache was released in 2004. Released with it were the E7525 (workstation), E7520 and E7320 (both server) chipsets, which added support for PCI Express, DDR-II and Serial ATA. The Xeon was noticeably slower than AMD's Opteron, although it could be faster in situations where Hyper-Threading came into play.

A slightly updated core called "Irwindale" was released in early 2005, with 2 MB L2 cache and the ability to have its clock speed reduced during low processor demand. Although it was a bit more competitive than the Nocona had been, independent tests showed that AMD's Opteron still outperformed Irwindale. Both of these Prescott-derived Xeons have the product code 80546.

Cranford and Potomac

64-bit Xeon MPs were introduced in April 2005. The cheaper "Cranford" was an MP version of Nocona, while the more expensive "Potomac" was a Cranford with 8 MB of L3 cache. Like Nocona and Irwindale, they also have product code 80546.

Dual-Core Xeon

"Paxville DP"

Paxville

Produced	From 2005 to 2008
Max. CPU clock rate	2667 Mhz to 3000 Mhz
FSB speeds	667 MT/s to 800 MT/s
Min. feature size	90 nm
Instruction set	x86
Microarchitecture	NetBurst
CPUID code	0F48
Product code	80551, 80560
Cores	2
L2 cache	2x2 MB
Application	DP Server, MP Server
Package(s)	LGA 771, Socket 604
Brand name(s)	Xeon

The first dual-core CPU branded Xeon, codenamed Paxville DP, product code 80551, was released by Intel on 10 October 2005. Paxville DP had NetBurst microarchitecture, and was a dual-core equivalent of the single-core Irwindale (related to the Pentium D branded "Smithfield"") with 4 MB of L2 Cache (2 MB per core). The only Paxville DP model released ran at 2.8 GHz, featured an 800 MT/s front side bus, and was produced using a 90 nm process.

7000-series "Paxville MP"

An MP-capable version of Paxville DP, codenamed Paxville MP, product code 80560, was released on 1 November 2005. There are two versions: one with 2 MB of L2 Cache (1 MB per core), and one with 4 MB of L2 (2 MB per core). Paxville MP, called the dual-core Xeon 7000-series, was produced using a 90 nm process. Paxville MP clock ranges between 2.67 GHz and 3.0 GHz (model numbers 7020-7041), with some models having a 667 MT/s FSB, and others having an 800 MT/s FSB.

Model	Speed (GHz)	L2 Cache (MB)	FSB (MHz)	TDP (W)
7020	2.66	2x1	667	165
7030	2.80	2x1	800	165
7040	3.00	2x2	667	165
7041	3.00	2x2	800	165

7100-series "Tulsa"

Tulsa

Produced	From 2006 to 2008
Max. CPU clock rate	2500 Mhz to 3500 Mhz
FSB speeds	667 MT/s to 800 MT/s
Min. feature size	65 nm
Instruction set	x86
Microarchitecture	NetBurst
CPUID code	0F68
Product code	80550
Cores	2
L2 cache	2x1 MB
L3 cache	16 MB
Application	MP Server
Package(s)	Socket 604
Brand name(s)	Xeon 71xx

Released on 29 August 2006,^[2] the 7100 series, codenamed Tulsa (product code 80550), is an improved version of Paxville MP, built on a 65 nm process, with 2 MB of L2 cache (1 MB per core) and up to 16 MB of L3 cache. It uses Socket 604 [1]. Tulsa was released in two lines: the N-line uses a 667 MT/s FSB, and the M-line uses an 800 MT/s FSB. The N-line ranges from 2.5 GHz to 3.5 GHz (model numbers 7110N-7150N), and the M-line ranges from 2.6 GHz to 3.4 GHz (model numbers 7110M-7140M). L3 cache ranges from 4 MB to 16 MB across the models.

Model	Speed (GHz)	L2 Cache (MB)	L3 Cache (MB)	FSB (MHz)	TDP (W)
7110N	2.50	2	4	667	95
7110M	2.60	2	4	800	95
7120N	3.00	2	4	667	95
7120M	3.00	2	4	800	95
7130N	3.16	2	8	667	150
7130M	3.20	2	8	800	150
7140N	3.33	2	16	667	150
7140M	3.40	2	16	800	150

5000-series "Dempsey"

Dempsey

Produced	2006
Max. CPU clock rate	2500 Mhz to 3730 Mhz
FSB speeds	667 MT/s to 1066 MT/s
Min. feature size	65nm
Instruction set	x86
Microarchitecture	NetBurst
Cores	2
L2 cache	4 MB
Application	DP Server
Package(s)	LGA 771
Brand name(s)	Xeon 50xx

On 23 May 2006, Intel released the dual-core CPU (Xeon branded 5000 series) codenamed Dempsey (product code 80555). Released as the Dual-Core Xeon 5000-series, Dempsey is a NetBurst microarchitecture processor produced using a 65 nm process, and is virtually identical to Intel's "Presler" Pentium Extreme Edition, except for the addition of SMP support, which lets Dempsey operate in dual-processor systems. Dempsey ranges between 2.50 GHz and 3.73 GHz (model numbers 5020-5080). Some models have a 667 MT/s FSB, and others have a 1066 MT/s FSB. Dempsey has 4 MB of L2 Cache (2 MB per core). A Medium Voltage model, at 3.2 GHz and 1066 MT/s FSB (model number 5063), has also been released. Dempsey also introduces a new interface for Xeon processors: LGA 771, also known as Socket J. Dempsey was the first Xeon core in a long time to be somewhat competitive with its Opteron-based counterparts, although it could not claim a decisive lead in any performance metric - that would have to wait for its successor, the Woodcrest.

Model	Speed (GHz)	L2 Cache (MB)	FSB (MHz)	TDP (W)
5020	2.50	2x2	667	95
5030	2.66	2x2	667	95
5040	2.83	2x2	667	95
5050	3.00	2x2	667	95
5060	3.20	2x2	1066	130
5063	3.20	2x2	1066	95
5070	3.46	2x2	1066	130
5080	3.73	2x2	1066	130

Pentium M (Yonah) based Xeon

LV (ULV), "Sossaman"

Sossaman

Produced	From 2006 to 2008
Max. CPU clock rate	1667 Mhz to 2167 Mhz
FSB speeds	667 MT/s
Min. feature size	90 nm
Instruction set	x86
Microarchitecture	Enhanced Pentium M
CPUID code	06Ex
Product code	80539
Cores	2
L2 cache	2 MB
Application	DP Server
Package(s)	Socket M
Brand name(s)	Xeon

On 14 March 2006, Intel released a dual-core processor codenamed Sossaman and branded as Xeon LV (low-voltage). Subsequently an ULV (ultra-low-voltage) version was released. The Sossaman was a low-/ultra-low-power and double-processor capable CPU (like AMD Quad FX), based on the "Yonah" processor, for ultradense non-consumer environment (i.e. targeted at the blade-server and embedded markets), and it was rated at a thermal design power (TDP) of 31 W (LV: 1.66 GHz, 2 GHz and 2.16 GHz) and 15 W (ULV: 1.66 GHz)^[4]. As such, it supported most of the same features as earlier Xeons: Virtualization Technology, 667 MT/s front side bus, and dual-core processing, but it did not support 64-bit operations, so it could not run 64-bit-only server software, such as Microsoft Exchange Server 2007, and therefore it was limited to only 16 GB of memory. A planned successor, codenamed "Merom MP" was to be a drop-in upgrade to allow Sossaman-based servers to upgrade to 64-bit capability. However, this was abandoned in favour of low-voltage versions of the Woodcrest LV processor leaving the Sossaman at a dead-end with no planned upgrades.

Model	Speed (GHz)	L2 Cache (MB)	FSB (MHz)	TDP (W)
ULV 1.66	1.66	2	667	15
LV 1.66	1.66	2	667	31
LV 2.00	2.00	2	667	31
LV 2.16	2.16	2	667	31

Core based Xeon

Dual-Core

3000-series "Conroe"

The 3000 series, codenamed Conroe (product code 80557) dual-core Xeon (branded) CPU,^[5] released at the end of September 2006, was the first Xeon for single-CPU operation. The same processor is branded as Core 2 Duo or as Pentium Dual-Core and Celeron, with varying features disabled. They use LGA 775 (Socket T), operate on a 1066 MHz front-side bus, support Enhanced Intel Speedstep Technology and Intel Virtualization Technology but do not support Hyper-Threading. Conroe Processors with a number ending in "5" have a 1333 MT/s FSB.^[6]

Model	Speed (GHz)	L2 Cache (MB)	FSB (MHz)	TDP (W)
3040	1.86	2	1066	65
3050	2.13	2	1066	65
3055*	2.13	4	1066	65
3060	2.4	4	1066	65
3065	2.33	4	1333	65
3070	2.66	4	1066	65
3075	2.66	4	1333	65
3080*	2.93	4	1066	65
3085	3.00	4	1333	65

• Models marked with a star are not present in Intel's database ^[7]

3100-series "Wolfdale"

The 3100 series, codenamed Wolfdale (product code 80570) dual-core Xeon (branded) CPU, was just a rebranded version of the Intel's mainstream Core 2 Duo E7000/E8000 and Pentium Dual-Core E5000 processors, featuring the same 45 nm process and 6 MB of L2 cache. Unlike most Xeon processors, they only support single-CPU operation. They use LGA 775 (Socket T), operate on a 1333 MHz front-side bus, support Enhanced Intel Speedstep Technology and Intel Virtualization Technology but do not support Hyper-Threading.

Model	Speed (GHz)	L2 Cache (MB)	FSB (MHz)	TDP (W)
E3110	3.00	6	1333	65
L3110	3.00	6	1333	45
E3120	3.16	6	1333	65

5100-series "Woodcrest"

Woodcrest

Produced	From 2006 to 2009
Max. CPU clock rate	1600 Mhz to 3000 Mhz
FSB speeds	1066 MT/s to 1333 MT/s
Min. feature size	65nm
Instruction set	x86
Microarchitecture	Core
CPUID code	06Fx
Product code	80556
Cores	2
L2 cache	4 MB
Application	DP Server
Package(s)	LGA 771
Brand name(s)	Xeon 51xx

On 26 June 2006, Intel released the dual-core CPU (Xeon branded 5100 series) codenamed Woodcrest (product code 80556); it was the first Intel Core microarchitecture processor to be launched on the market. It is a server and workstation version of the Intel Core 2 processor. Intel claims that it provides an 80% boost in performance, while reducing power consumption by 20% relative to the Pentium D.

Most models have a 1333 MT/s FSB, except for the 5110 and 5120, which have a 1066 MT/s FSB. The fastest processor (5160) operates at 3.0 GHz. All Woodcrests use LGA 771 and all except two models have a TDP of 65 W. The 5160 has a TDP of 80 W and the 5148LV (2.33 GHz) has a TDP of 40 W. The previous generation Xeons had a TDP of 130 W. All models support Intel 64 (Intel's x86-64 implementation), the XD bit, and Virtualization Technology, with the "Demand Based Switching" power management option only on Dual-Core Xeon 5140 or above. Woodcrest has 4 MB of shared L2 Cache.

Model	Speed (GHz)	L2 Cache (MB)	FSB (MHz)	TDP (W)
5110	1.60	4	1066	65
5120	1.83	4	1066	65
5128	1.83	4	1066	40
5130	2.0	4	1333	65
5138	2.13	4	1066	35
5140	2.33	4	1333	65
5148	2.33	4	1333	40
5150	2.66	4	1333	65
5160	3.00	4	1333	80

5200-series "Wolfdale-DP"

Wolfdale-DP

Produced	From 2007 to present
Max. CPU clock rate	1866 Mhz to 3500 Mhz
FSB speeds	1066 MT/s to 1600 MT/s
Min. feature size	45 nm
Instruction set	x86
Microarchitecture	Penryn
CPUID code	1067x
Product code	80573
Cores	2
L2 cache	6 MB
Application	DP Server
Package(s)	LGA 771
Brand name(s)	Xeon 52xx

On 11 November 2007, Intel released the dual-core CPU (Xeon branded 5200 series) codenamed Wolfdale-DP (product code 80573)^[8]. It is built on a 45 nm process like the desktop Core 2 Duo and Xeon-SP Wolfdale, featuring Intel 64 (Intel's x86-64 implementation), the XD bit, and Virtualization Technology. It is unclear whether the "Demand Based Switching" power management is available on the L5238.^[9] Wolfdale has 6 MB of shared L2 Cache.

Model	Speed (GHz)	L2 Cache (MB)	FSB (MHz)	TDP (W)
E5205	1.86	6	1066	65
L5238	2.66	6	1333	35
X5260	3.33	6	1333	80
X5270	3.50	6	1333	80
X5272	3.40	6	1600	80

7200-series "Tigerton"

The 7200 series, codenamed Tigerton (product code 80564) is an MP-capable processor, similar to the 7300 series, but, in contrast, only one core is active on each silicon chip, and the other one is turned off (blocked), resulting as a dual-core capable processor. [2] [3][4] [5]

Model	Speed (GHz)	L2 Cache (MB)	FSB (MHz)	TDP (W)
E7210	2.40	2x4	1066	80
E7220	2.93	2x4	1066	81

Quad-Core and Multi-Core Xeon

3200-series "Kentsfield"

Intel released relabeled versions of its quad-core (2x2) Core 2 Quad processor as the Xeon 3200-series (product code 80562) on 7 January 2007.^[10] The 2x2 "quad-core" (dual-die dual-core^[11]) comprised two separate dual-core die next to each other in one CPU package. The models are the X3210, X3220 and X3230, running at 2.13 GHz, 2.4 GHz and 2.66 GHz, respectively.^[12] Like the 3000-series, these models only support single-CPU operation and operate on a 1066 MHz front-side bus. It is targeted at the "blade" market. The X3220 is also branded and sold as Core2 Quad Q6600, the X3230 as Q6700.

Model	Speed (GHz)	L2 Cache (MB)	FSB (MHz)	TDP (W)
X3210	2.13	2x4	1066	100/105
X3220	2.40	2x4	1066	100/105
X3230	2.66	2x4	1066	100

3300-series "Yorkfield"

Intel released relabeled versions of its quad-core Core 2 Quad Yorkfield Q9400 and Q9x50 processors as the Xeon 3300-series (product code 80569). It comprised two separate dual-core dies next to each other in one CPU package and manufactured in a 45 nm process. The models are the X3320, X3350, X3360 and X3370, running at 2.50 GHz, 2.66 GHz, 2.83 GHz and 3.0 GHz, respectively. The L2 cache is a unified 6 MB per die (except for the X3320 with a smaller 3 MB L2 cache per die), and a front-side bus of 1333 MHz. All models feature Intel 64 (Intel's x86-64 implementation), the XD bit, and Virtualization Technology, as well as "Demand Based Switching".

The Yorkfield-CL (product code 80584) variant of these processors are X3323, X3353 and X3363, a reduced TDP of 80W and are made for single-CPU LGA 771 systems instead of LGA 775, which is used in all other Yorkfield processors. Otherwise they are identical to their Yorkfield counterparts.

5300-series "Clovertown"

Clovertown

Produced	From 2006 to present
Max. CPU clock rate	1600 Mhz to 3000 Mhz
FSB speeds	1066 MT/s to 1333
Min. feature size	65 nm
Instruction set	x86
Microarchitecture	Core
CPUID code	06Fx
Product code	80574
Cores	4
L2 cache	2x4 MB
Application	DP Server
Package(s)	LGA 771
Brand name(s)	Xeon 53xx

A quad-core (2x2) successor of the Woodcrest for DP segment, consisting of two dual-core Woodcrest chips in one package similarly to the dual-core Pentium D branded CPUs (two single-core chips) or the quad-core Kentsfield. All Clovertowns use the LGA 771 package. The Clovertown has been usually implemented with two Woodcrest dies on a multi-chip module, with 8 MB of L2 cache (4 MB per die). Like Woodcrest, lower models use a 1066 MT/s FSB, and higher models use a 1333 MT/s FSB. Intel released Clovertown, product code 80563, on 14 November 2006^[13] with models E5310, E5320, E5335, E5345, and X5355, ranging from 1.6 GHz to 2.66 GHz. All models support: MMX, SSE, SSE2, SSE3, SSSE3, Intel 64, XD bit (an NX bit implementation), Intel VT. The E and X designations are borrowed from Intel's Core 2 model numbering scheme; an ending of -0 implies a 1066 MT/s FSB, and an ending of -5 implies a 1333 MT/s FSB.^[12] All models have a TDP of 80 W with the exception of the X5355, which has a TDP of 120 W. A low-voltage version of Clovertown with a TDP of 50 W has a model numbers L5310, L5320 and L5335 (1.6 GHz, 1.86 GHz and 2.0 GHz respectively). The 3.0 GHz X5365 arrived in July 2007, and became available in the Apple Mac Pro [6] on 4 April 2007.[7]^[14] The X5365 performs up to around 38 GFLOPS in the LINPACK benchmark. [8]

Model	Speed (GHz)	L2 Cache (MB)	FSB (MHz)	TDP (W)
E5310	1.60	2x4	1066	80
L5310	1.60	2x4	1066	50
E5320	1.83	2x4	1066	80
L5320	1.83	2x4	1066	50
E5335	2.00	2x4	1333	80
L5335	2.00	2x4	1333	50
E5345	2.33	2x4	1333	80
X5355	2.66	2x4	1333	120
X5365	3.00	2x4	1333	120

5400-series "Harpertown"

Harpertown

Produced	From 2007 to present
Max. CPU clock rate	2000 Mhz to 3400 Mhz
FSB speeds	1333 MT/s to 1600
Min. feature size	45 nm
Instruction set	x86
Microarchitecture	Penryn
CPUID code	1067x
Product code	80574
Cores	4
L2 cache	2x6 MB
Application	DP Server
Package(s)	LGA 771
Brand name(s)	Xeon 54xx Core 2 Quad QX9775

On 11 November 2007 Intel presented Yorkfield based Xeons - called Harpertown (product code 80574) - to the public.[9] This family consists of dual die quad-core CPUs manufactured on a 45 nm process and featuring 1333 MHz to 1600 MHz front-side buses, with TDP rated from 50 W to 150 W depending on the model. These processors fit in the LGA 771 package. All models feature Intel 64 (Intel's x86-64 implementation), the XD bit, and Virtualization Technology. All except the E5405 also feature Demand Based Switching^[15]. The supplementary character in front of the model-number represents the thermal rating: an L depicts a TDP of 50 W, an E depicts 80 W whereas an X is 120 W TDP or above. The speed of 3.00 GHz comes as four models, two models with 80 W TDP two other models with 120 W TDP with 1333 MHz or 1600 MHz front-side bus respectively. The fastest Harpertown is the X5492 whose TDP of 150 W is higher than those of the Prescott-based Xeon DP but having twice as many cores. (The X5482 is also sold under the name "Core 2 Extreme QX9775" for use in the Intel SkullTrail system.)

Intel 1600 MHz front-side bus Xeon processors will drop into the Seaburg chipset whereas several mainboards featuring the Intel 5000/5200-chipset are enabled to run the processors with 1333 MHz front-side bus processors. Seaburg features support for dual PCIe 2.0 x16 slots and up to 128 GB of memory.^[16][17]

Model	Speed (GHz)	L2 Cache (MB)	FSB (MHz)	TDP (W)
E5405	2.00	2x6	1333	80
E5410	2.33	2x6	1333	80
L5410	2.33	2x6	1333	50
E5420	2.50	2x6	1333	80
L5420	2.50	2x6	1333	50
E5430	2.66	2x6	1333	80
L5430	2.66	2x6	1333	50
E5440	2.83	2x6	1333	80
X5450	3.00	2x6	1333	120
E5450	3.00	2x6	1333	80
X5460	3.16	2x6	1333	120
X5470	3.33	2x6	1333	120
E5462	2.80	2x6	1600	80
X5472	3.00	2x6	1600	120
E5472	3.00	2x6	1600	80
X5482	3.20	2x6	1600	150
X5492	3.40	2x6	1600	150

7300-series "Tigerton"

Tigerton

Produced	From 2007 to present
Max. CPU clock rate	1600 Mhz to 2933 Mhz
FSB speeds	1066 MT/s
Min. feature size	65 nm
Instruction set	x86
Microarchitecture	Core
CPUID code	06Fx
Product code	80564 80565
Cores	4
L2 cache	2×2 or 2×4 MB
Application	MP Server
Package(s)	mPGA604
Brand name(s)	Xeon 72xx Xeon 73xx

The 7300 series, codenamed Tigerton (product code 80565) is a four-socket (packaged in Socket 604) and more capable quad-core processor, consisting of two dual core Core2 architecture silicon chips on a single ceramic module, similar to Intel's Xeon 5300 series Clovertown processor modules.^[18]

The 7300 series uses Intel's Caneland (Clarksboro) platform.

Intel claims the 7300 series Xeons offer more than twice the performance and more than three times the performance per watt as Intel's previous generation 7100 series. The 7300 series' Caneland chipset provides a point to point interface allowing the full front side bus bandwidth per processor.

The 7xxx series is aimed at the large server market, supporting configurations of up to 32 CPUs per host.

model	Speed (GHz)	L2 Cache (MB)	FSB (MHz)	TDP (W)
E7310	1.60	2×2	1066	80
E7320	2.13	2×2	1066	80
E7330	2.40	2×3	1066	80
E7340	2.40	2×4	1066	80
L7345	1.86	2×4	1066	50
X7350	2.93	2×4	1066	130

7400-series "Dunnington"

Dunnington

Produced	From 2008 to present
Max. CPU clock rate	2133 Mhz to 2667 Mhz
FSB speeds	1066 MT/s
Min. feature size	45 nm
Instruction set	x86
Microarchitecture	Penryn
CPUID code	106D1
Product code	80582
Cores	6
L2 cache	3x3 MB
L3 cache	16 MB
Application	MP Server
Package(s)	mPGA604
Brand name(s)	Xeon 74xx

Dunnington^[19] - the last CPU of the Penryn generation and Intel's first multi-core (above two) die - features a single-die six- (or hexa-) core design with three unified 3 MB L2 caches (resembling three merged 45 nm dual-core Wolfdale dies), and 96 KB L1 cache (Data) and 16 MB of L3 cache. It features 1066 MHz FSB, fits into the Tigerton's mPGA604 socket, and is compatible with the both the Intel Caneland, and IBM X4 chipsets. These processors support DDR2-1066 (533 MHz), and have a maximum TDP below 130 W. They are intended for blades and other stacked computer systems. Availability was scheduled for the second half of 2008. It was followed shortly by the Nehalem microarchitecture.

Announced on Sept. 15, 2008. Intel link

model	Speed (GHz)	L3 Cache (MB)	FSB (MHz)	TDP (W)	Cores
E7420	2.13	8	1066	90	4
E7430	2.13	12	1066	90	4
E7440	2.40	16	1066	90	4
L7445	2.13	12	1066	50	4
E7450	2.40	12	1066	90	6
L7455	2.13	12	1066	65	6
X7460	2.66	16	1066	130	6

Nehalem based Xeon

3400-series "Lynnfield"

Xeon 3400-series processors based on Lynnfield fill the gap between the previous 3300-series "Yorkfield" processors and the newer 3500-series "Bloomfield". Like Bloomfield, they are quad-core single-package processors based on the Nehalem microarchitecture, but were introduced almost a year later, in September 2009. The same processors are marketed for mid-range to high-end desktops systems as Core i5 and Core i7. They have two integrated memory channels as well as PCI Express and Direct Media Interface links, but no QuickPath Interface.

3400-series "Clarkdale"

At low end of the 3400-series is not a Lynnfield but a Clarkdale processor, which is also used in the Core i3-500 and Core i5-600 processors as well as the Celeron G1000 and G6000 Pentium series. A single model was released in March 2010, the Xeon L3406. Compared to all other Clarkdale based products, this one does not support integrated graphics, but has a much lower thermal design power of just 30 W. Compared to the Lynnfield based Xeon 3400 models, it only offers two cores but does support the AES-NI instruction set extension that the earlier 45 nm Nehalem based processors do not have.

3500-series "Bloomfield"

Bloomfield is the codename for the successor to the Xeon Core microarchitecture, is based on the Nehalem microarchitecture and uses the same 45 nm manufacturing methods as Intel's Penryn. The first processor released with the Nehalem architecture is the desktop Intel Core i7, which was released in November 2008. This is the server version for single CPU systems. This is a single-socket Intel Xeon processor. The performance improvements over previous Xeon processors are based mainly on:

• Integrated memory controller supporting 3 Memory Channels of DDR3 UDIMM (Unbuffered) or RDIMM (Registered)
• A new point-to-point processor interconnect QuickPath, replacing the legacy front side bus
• Simultaneous multithreading by multiple cores and hyper-threading (2x per core).

model	Speed (GHz)	L3 Cache (MB)	QPI speed (GT/s)	DDR3 Clock (MHz)	TDP (W)	Cores	Threads	Turbo-Boost
W3503	2.40	4	4.8	1066	130	2	2	No
W3505	2.53	4	4.8	1066	130	2	2	No
W3520	2.66	8	4.8	1066	130	4	8	Yes
W3530	2.80	8	4.8	1066	130	4	8	Yes
W3540	2.93	8	4.8	1066	130	4	8	Yes
W3550	3.06	8	4.8	1066	130	4	8	Yes
W3565	3.20	8	4.8	1066	130	4	8	Yes
W3570	3.2	8	6.4	1333	130	4	8	Yes
W3580	3.33	8	6.4	1333	130	4	8	Yes

5500-series "Gainestown"

Gainestown

Produced	From 2008 to present
Max. CPU clock rate	1866 Mhz to 3333 Mhz
Min. feature size	45 nm
Instruction set	x86
Microarchitecture	Nehalem
CPUID code	106Ax
Product code	80602
Cores	4
L2 cache	4x256 KB
L3 cache	8 MB
Application	DP Server
Package(s)	LGA 1366
Brand name(s)	Xeon 55xx

Gainestown or Nehalem-EP, the successor to the Xeon Core microarchitecture, is based on the Nehalem microarchitecture and uses the same 45 nm manufacturing methods as Intel's Penryn. The first processor released with the Nehalem microarchitecture is the desktop Intel Core i7, which was released in November 2008. Server processors of the Xeon 55xx range were first supplied to testers in December 2008.^[20]

The performance improvements over previous Xeon processors are based mainly on:

• Integrated memory controller supporting three memory channels of DDR3 SDRAM.
• A new point-to-point processor interconnect QuickPath, replacing the legacy front side bus. Gainestown has two QuickPath interfaces.
• Hyper-threading (2x per core, starting from 5518), that was already present in pre-Core Duo processors.

model	Speed (GHz)	L3 Cache (MB)	QPI speed (GT/s)	DDR3 Clock (MHz)	TDP (W)	Cores	Threads	Turbo-Boost
E5502	1.87	4	4.8	800	80	2	2	No
E5503	2.00	4	4.8	800	80	2	2	No
E5504	2.00	4	4.8	800	80	4	4	No
E5506	2.13	4	4.8	800	80	4	4	No
L5506	2.13	4	4.8	800	60	4	4	No
L5518	2.13	8	5.86	1066	60	4	8	Yes
E5520	2.26	8	5.86	1066	80	4	8	Yes
L5520	2.26	8	5.86	1066	60	4	8	Yes
E5530	2.40	8	5.86	1066	80	4	8	Yes
L5530	2.40	8	5.86	1066	60	4	8	Yes
E5540	2.53	8	5.86	1066	80	4	8	Yes
X5550	2.66	8	6.4	1333	95	4	8	Yes
X5560	2.80	8	6.4	1333	95	4	8	Yes
X5570	2.93	8	6.4	1333	95	4	8	Yes
W5580	3.20	8	6.4	1333	130	4	8	Yes
W5590	3.33	8	6.4	1333	130	4	8	Yes

C3500/C5500-series "Jasper Forest"

Jasper Forest

Produced	From 2010 to present
Max. CPU clock rate	1733 Mhz to 2400 Mhz
Min. feature size	45 nm
Instruction set	x86
Microarchitecture	Nehalem
CPUID code	106Ex
Product code	80612
Cores	4
L2 cache	4x256 KB
L3 cache	8 MB
Application	UP/DP Server
Package(s)	LGA 1366
Brand name(s)	Xeon C35xx (UP) Xeon C55xx (DP) Celeron P1xxx (UP)

Jasper Forest is a Nehalem-based embedded processor with PCI Express connections on-die, core counts from 1 to 4 cores and power envelopes from 23 to 85 watts.^[21]

The uni-processor version without QPI comes as LC35xx and EC35xx, while the dual-processor version is sold as LC55xx and EC55xx and uses QPI for communication between the processors. Both versions use a DMI link to communicate with the 3420 that is also used in the 3400-series Lynfield Xeon processors, but use an LGA 1366 package that is otherwise used for processors with QPI but no DMI or PCI Express links. The CPUID code of both Lynnfield and Jasper forest is 106Ex, i.e. family 6, model 30.

The Celeron P1053 belongs into the same family as the LC35xx series, but lacks some RAS features that are present in the Xeon version.

3600/5600-series "Gulftown"

Gulftown or Westmere-EP, a six-core 32 nm Westmere-based processor, is the basis for the Xeon 36xx and 56xx series and the Core i7-980X. It launched in the first quarter of 2010. The 36xx-series follows the 35xx-series Bloomfield uni-processor model while the 56xx-series follows the 55xx-series Gainestown dual-processor model and both are socket compatible to their predecessors.

Model	Speed (GHz)	L3 Cache (MB)	QPI speed (GT/s)	DDR3 Clock (MHz)	TDP (W)	Cores	Threads	Turbo-Boost
W3670	3.20	12	4.8	1066	130	6	12	Y
W3680	3.33	12	6.4	1333	130	6	12	Y
L5609	1.86	12	4.8	1066	40	4	4	N
L5618	1.86	12	5.86	1066	40	4	8	Y
L5630	2.13	12	5.86	1066	40	4	8	Y
E5620	2.40	12	5.86	1066	80	4	8	Y
E5630	2.53	12	5.86	1066	80	4	8	Y
E5640	2.66	12	5.86	1066	80	4	8	Y
X5667	3.06	12	6.4	1333	95	4	8	Y
X5677	3.46	12	6.4	1333	130	4	8	Y
L5638	2.00	12	5.86	1333	60	6	12	Y
L5640	2.26	12	5.86	1333	60	6	12	Y
E5645	2.40	12	5.86	1333	80	6	12	Y
X5650	2.66	12	6.4	1333	95	6	12	Y
X5660	2.80	12	6.4	1333	95	6	12	Y
X5670	2.93	12	6.4	1333	95	6	12	Y
X5680	3.33	12	6.4	1333	130	6	12	Y

6500/7500-series "Beckton"

Beckton

Produced	From 2010 to present
Max. CPU clock rate	1733 Mhz to 2667 Mhz
Min. feature size	45 nm
Instruction set	x86
Microarchitecture	Nehalem
CPUID code	206Ex
Product code	80604
Cores	8
L2 cache	8x256 KB
L3 cache	24 MB
Application	DP/MP Server
Package(s)	LGA 1567
Brand name(s)	Xeon 65xx (DP) Xeon 75xx (MP)

Beckton or Nehalem-EX (EXpandable server market) is a Nehalem-based processor with up to eight cores and uses buffering inside the chipset to support up to 16 standard DDR3 DIMMS per CPU socket without requiring the use of FB-DIMMS.^[22] Unlike all previous Xeon MP processors, Nehalem-EX uses the new LGA 1567 package, replacing the Socket 604 used in the previous models, up to Xeon 7400 "Dunnington". The 75xx models have four QuickPath interfaces, so it can be used in up-to eight-socket configurations, while the 65xx models are only for up to two sockets. Designed by the Digital Enterprise Group (DEG) Santa Clara and Hudson Design Teams, Beckton is manufactured on the P1266 (45 nm) technology. Its launch in March 2010 coincided with that of its direct competitor, AMD's Opteron 6xxx "Magny-Cours".^[23]

Most models limit the number of cores and QPI links as well as the L3 Cache size in order to get a broader range of products out of the single chip design.

Model	Speed (GHz)	L3 Cache (MB)	QPI speed (GT/s)	DDR3 Clock (MHz)	TDP (W)	Cores	Threads	Turbo-Boost
E6510	1.73	12	2x4.8	800	105	4	8
E6540	2.00	18	2x6.4	1066	105	6	12
X6550	2.00	18	2x6.4	1066	130	8	16
E7520	1.86	18	3x4.8	800	95	4	8
E7530	1.86	12	3x5.8	1066	105	6	12
E7540	2.00	18	4x6.4	1066	105	6	12
X7542	2.66	18	4x5.8	1066	130	6	6	0/1/1/1
L7545	1.86	18	4x5.8	1066	95	6	12	0/1/3/5
X7550	2.00	18	4x6.4	1066	130	8	16
L7555	1.86	24	4x5.8	1066	95	8	16	1/2/4/5
X7560	2.26	24	4x6.4	1066	130	8	16

Future versions

Minor additions of faster models to the existing Nehalem based product lines are expected in 2010, while a new microarchitecture called Sandy Bridge has been announced to be released in 2011.

Supercomputers

Supercomputers based on Xeon processors that have been in the top ten of the Top500 fastest supercomputers in the world are:

• After upgrades from Pentium Pro to Xeon, ASCI Red reclaimed its #1 spot in 1999 with a speed of 2.4 TFLOPS.^[24]
• an Intel Xeon system at SGI in Chippewa Falls, Wisconsin. Machine: SGI Altix ICE 8200 system with 3584 Quad-Core Clovertown processors at 3.0 GHz and InfiniBand interconnect. This supercomputer was listed in third place in November 2007, ahead of the fastest Itanium and Opteron-based supercomputers but behind two PowerPC-based Blue Gene systems.^[25]

Xeon processor based system, in the top 20 of the fastest systems by memory bandwidth as measured by STREAM benchmark:^[26]

• an Intel Xeon virtual SMP system leveraging ScaleMP's Versatile SMP (vSMP) architecture with 128 cores and 1TB RAM.^[27] This system aggregates 16 Stoakley platform (Seaburg chipset) systems with total of 32 Harpertown processors.

References